Estimation of On-Chip Simultaneous Switching Noise on Signal Delay in Synchronous CMOS Integrated Circuits
نویسندگان
چکیده
On-chip parasitic inductance inherent to the power distribution network has becoming significant in high speed digital circuits. Therefore, current surges result in voltage fluctuations within the power distribution network, creating delay uncertainty. On-chip simultaneous switching noise should therefore be considered when estimating the propagation delay of a CMOS logic gate in high speed synchronous CMOS integrated circuits.
منابع مشابه
Delay Uncertainty Due to On-chip Simultaneous Switching Noise in High Performance Cmos Integrated Circuits
On-chip parasitic inductance inherent to the power supply rails has become significant in high speed digital circuits. Therefore, current surges result in voltage fluctuations within the power distribution networks, creating delay uncertainty. On-chip simultaneous switching noise should therefore be considered when estimating the propagation delay of a CMOS logic gate in high speed synchronous ...
متن کاملModeling and Simulation of Substrate Noise in Mixed-Signal Circuits Applied to a Special VCO
The mixed-signal circuits with both analog and digital blocks on a single chip have wide applications in communication and RF circuits. Integrating these two blocks can cause serious problems especially in applications requiring fast digital circuits and high performance analog blocks. Fast switching in digital blocks generates a noise which can be introduced to analog circuits by the common su...
متن کاملEstimation of On-Chip Simultaneous Switching Noise in VDSM CMOS Circuits
On-chip simultaneous switching noise (SSN) has become an important issue in the design of power distribution networks in current VLSI/ULSI circuits. An analytical expression characterizing the simultaneous switching noise voltage is presented here based on a lumped model. The waveform describing the SSN voltage is quite close to the waveform obtained from SPICE. The peak value of the simultaneo...
متن کاملModeling of Substrate Noise Impact on a Single-Ended Cascode LNA in a Lightly Doped Substrate (RESEARCH NOTE)
Substrate noise generated by digital circuits on mixed-signal ICs can disturb the sensitiveanalog/RF circuits, such as Low Noise Amplifier (LNA), sharing the same substrate. This paperinvestigates the adverse impact of the substrate noise on a high frequency cascode LNA laid out on alightly doped substrate. By studying the major noise coupling mechanisms, a new and efficientmodeling method is p...
متن کاملSimultaneous switching noise in on-chip CMOS power distribution networks
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra large scale integration (VLSI/ULSI) circuits. An inductive model is used to characterize the power supply rails when a transient current is generated by simultaneously switching the on-chip registers and logic gates in a...
متن کامل